Given the programming diagram below for a PLD, what is the logic implemented at Output X?

A.  $$AB+barAbarB$$
B.  $$AbarB+barAB$$
C.  $$AbarB$$
D.  $$barAB$$

In the following diagram, we have the following three gates:

INVERTER with output: $\overline{A}$

AND gate with output: $A·B$

OR gate with output: $A+B$

Walking through the PLD for output X, we can write the logic as follows:

$$\begin{gathered} X = (\overline{A}·B) + (A·\overline{B}) \\ X = \overline{A}B+ A\overline{B} \end{gathered}$$

This corresponds to answer B.