Flip-flops A and B form a sequential synchronous circuit as shown below.

After the clock pulse, binary count 10 (A=1, B=0) changes to:

A.  00
B.  01
C.  10
D.  11

In this circuit, we have the JK flip flop followed by the D flip flop. The output of these devices at the next clock pulse will depend on the current inputs to each. The transition tables for both of these devices can be found on page 390 of our FE Reference Handbook, and are shown below:

We are given that the binary count is currently A = 1, B = 0. 

Based on the circuit, we can see that output of our D flip flip, B, is also fed into its input, D. Therefore:

$$\begin{gathered} B = D \\ B = 0 \\ D = 0 \end{gathered}$$

Consulting the table for our D flip flop and knowing D is equal to 0, we can see the output at the next clock cycle will also be equal to 0. 

Since $\overline{B}$ is fed directly to K of the JK flip flop, we know:

$$\begin{gathered} \overline{B}=K \\ \overline{B} =1 \\ K = 1 \end{gathered}$$

Finally, we see that J = 1 from the circuit diagram. Based on JK = 11, from our table it is clear that the value of the output of the JK flip flop, A, will toggle. Since the current value of A is 1, it must toggle to 0.

Since A is the most significant bit (MSB), which is the left-most digit in a binary number, and B is the least significant bit (LSB), after the clock pulse our binary count will become 00. This corresponds to answer A.