An n-channel JFET has a pinch-off voltage $$V_p$$, of -4 V and $$I_(DSS)$$, of 16 mA. This device is to operate in the saturation region.  When the quiescent drain current is 4 mA, the gate-to-source voltage (V) required to give this operating point is most nearly:

A.  -2.0
B.  -2.5
C.  -3.0
D.  -4.0

When an n-channel JFET is operated in the saturation region, the drain current essentially can be controlled by the voltage that is across the gate and source of the transistor. This equation is as follows:

$I_D=I_{DSS}(1-{(V_{GS}/V_P))}^2$

where

$$\begin{gathered} I_D is the drain current \\ {I}_{DSS} is the maxium saturation current \\ {V}_{GS} is the gate-source voltage \\ {V}_P is the pinched-off voltage \end{gathered}$$

The problem gives us all of the variables required to find the gate-to-source voltage required to operate with a drain current of 4mA:

$$\begin{gathered} I_D=I_{DSS}(1-{(V_{GS}/V_P))}^2 \\ 4mA = (16mA\left)\right(1-{(V_{GS}/-4V))}^2 \\ .004 = (.016)(1-(\raisebox{1ex}{$2V_{GS}$}\!\left/ \!\raisebox{-1ex}{$-4$}\right.)+(\raisebox{1ex}{${\left(V_{GS}\right)}^2$}\!\left/ \!\raisebox{-1ex}{$16$}\right.\left)\right) \\ .25 = (1-(\raisebox{1ex}{$2V_{GS}$}\!\left/ \!\raisebox{-1ex}{$-4$}\right.)+(\raisebox{1ex}{${\left(V_{GS}\right)}^2$}\!\left/ \!\raisebox{-1ex}{$16$}\right.\left)\right) \\ 16*(.25) = (1-(\raisebox{1ex}{$2V_{GS}$}\!\left/ \!\raisebox{-1ex}{$-4$}\right.)+(\raisebox{1ex}{${\left(V_{GS}\right)}^2$}\!\left/ \!\raisebox{-1ex}{$16$}\right.\left)\right)*16 \\ 4 = 16 + 8V_{GS}+{\left(V_{GS}\right)}^2 \\ { \left(V_{GS}\right)}^2+8V_{GS}+12=0 \end{gathered}$$

Now we solve the quadratic equation for $V_{GS}$:

$(V_{GS}+2)(V_{GS}+6) = 0$

$V_{GS}=-2, -6$

Therefore, we have two possible values for the gate to source voltage here. However, our JFET has a certain gate-to-source voltage that, once passed, will cause the FET to operate in the cut-off region rather than the saturation region. For our n-channel JFET, this voltage is equal to in magnitude to our pinch-off voltage $V_P$ and is termed $V_{GS}\left(off\right)$.

$V_{GS}\left(off\right) = V_{P }= -4V$

Therefore, our gate-to-source voltage cannot be more negative than -4V. This eliminates -6V from being an answer. Therefore, our gate-to-source voltage must be equal to -2.0, which is answer A.